A Time-Based Readout for Vector-Matrix Multiplication in Fully Analog Memristive SNNs
Artificial neural networks rely on vector-matrix multiplications (VMMs), whose implementation in von Neumann architectures is dominated by costly data movement between memory and processing units. Spiking neural networks (SNNs) mitigate this bottleneck by performing in-memory, analog VMMs using memristive crossbar arrays. However, conventional current-mode readout circuits incur significant area and power overhead. This work proposes a fully analog readout architecture based on voltage-to-time conversion of the VMM output. By sensing the column voltage, the proposed approach avoids current-mode summing and scaling circuitry, improving area and energy efficiency. Post-layout simulations of...
| Authors | Elia Mateu-Barriendos, Álvaro Gómez-Pau, Josep Rius et al. |
|---|---|
| Primary category | cs.ET |
| Published | 10 September 2026 |
| Last updated at source | 10 September 2026 |
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