Eco-SoC: A Sustainable VLSI Architecture for Energy-Proportional Artificial Intelligence
In an era defined by escalating climate change and the pervasive deployment of edge intelligence, the environmental cost of semiconductor manufacturing and operation has reached a critical threshold. As Deep Learning (DL) accelerators dominate System-on-Chip (SoC) die area, achieving true sustainability requires a paradigm shift from static worst-case efficiency to dynamic energy-proportionality. This paper introduces Eco-SoC, a highly scalable VLSI architecture co-designed specifically for sustainable artificial intelligence. We propose a hardware-level Dynamic Precision-Scaling Logic (DPSL) framework that adaptively modulates bit-width precision based on real-time activation sparsity, s...
| Authors | Jatin Chopra |
|---|---|
| Primary category | cs.AR |
| Published | 9 August 2026 |
| Last updated at source | 9 August 2026 |
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