SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence
Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks. However, their application to analog and mixed-signal domains remains limited by the lack of machine-readable representations of existing circuit design knowledge. Circuit schematic images found in research manuscripts, textbooks, and websites constitute a vast repository of validated designs; however, these visual representations cannot be directly processed by EDA tools. Converting them into machine-readable netlists is essential for enabling simulation, verification, and building comprehensive databases for A...
| Authors | Saoud Aldowaish, Yashwanth Karumanchi, Kai-Chen Chiang et al. |
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| Primary category | cs.LG |
| Published | 2 July 2026 |
| Last updated at source | 2 July 2026 |
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