Interpretable and Verifiable Hardware Generation with LLM-Driven Stepwise Refinement
Large language models (LLMs) have achieved remarkable success in software development. However, they are susceptible to hallucinations, meaning that they can introduce subtle semantic and logical errors. Due to the high stakes in chip design and manufacturing, hardware engineers are still reluctant to rely on LLMs for register-transfer level (RTL) generation. In this paper, we propose a hardware generation framework that combines the creativity and broad knowledge of LLMs with the explainability and mathematical rigor of formal methods. Specifically, we devise a set of transformation rules that cover various design decisions and hardware features. By iteratively applying these rules, an L...
| Authors | You Li, Samuel Mandell, David Z. Pan |
|---|---|
| Primary category | cs.SE |
| Published | 16 June 2026 |
| Last updated at source | 13 July 2026 |
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