SMEPilot: Characterizing and Optimizing LLM Inference with Scalable Matrix Extensions
Modern CPUs increasingly integrate matrix extensions, such as Arm Scalable Matrix Extension (SME), that provide high-throughput matrix execution within the CPU. For LLM inference, however, these units are not a universal replacement for conventional CPU cores: prefill, decode, attention, and KV-cache operations expose different arithmetic intensities, vector behavior, and layout requirements, while SME units and CPU cores still compete for shared memory bandwidth. This paper studies this mismatch through a roofline-based characterization of SME-enabled CPUs and uses the resulting model to guide operator-level execution choices. We present SMEPilot, an LLM inference engine that selects CPU...
| Authors | Feiyang Chen, Haibo Chen |
|---|---|
| Primary category | cs.DC |
| Published | 15 June 2026 |
| Last updated at source | 15 June 2026 |
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