Not All Thoughts Need HBM: Semantics-Aware Memory Hierarchy for LLM Reasoning
Reasoning LLMs produce thousands of chain-of-thought tokens whose KV cache must reside in scarce GPU HBM. The dominant response -- permanently evicting low-importance tokens -- is catastrophic for reasoning: accuracy collapses to 0-2.5% when half the cache is removed. We ask a different question: must every token live in HBM, or can some live elsewhere? We introduce a semantics-aware memory hierarchy that sorts tokens into four tiers -- HBM, DDR, compressed, and evicted -- using cumulative attention scoring. Low-importance tokens are moved to CPU memory rather than destroyed; before each attention step they are prefetched back at full precision, contributing exactly the same terms as if t...
| Authors | Aojie Yuan, Tianqi Shen, Dajun Zhang |
|---|---|
| Primary category | cs.CL |
| Published | 10 May 2026 |
| Last updated at source | 10 May 2026 |
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