CktFormalizer: Autoformalization of Natural Language into Circuit Representations
Hardware infrastructure is a critical bottleneck for LLM-driven circuit design, limiting what agents can express, compile, and iteratively refine within an agentic loop. To address this bottleneck, we introduce CKTLEAN, a typed hardware infrastructure embedded in Lean. It supports hardware description, compilation to SystemVerilog, and interactive type-checking and proof feedback through a persistent read-eval-print loop (REPL). On this foundation, we build CKTFORMALIZER, an agent framework for hardware generation, repair, optimization, and source-level equivalence proving. We evaluate structural correctness through compilation, functional correctness through RTL and gate-level simulation...
| Authors | Jing Xiong, Qi Han, Chenchen Ding et al. |
|---|---|
| Primary category | cs.CL |
| Published | 8 May 2026 |
| Last updated at source | 4 October 2026 |
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