LLM-Driven Design Space Exploration of FPGA-based Accelerators
Designing field-programmable gate array (FPGA)-based accelerators for modern artificial intelligence workloads requires navigating a large and complex hardware design space encompassing architectural parameters, dataflow strategies, and memory hierarchies, making the process time-consuming and resource-intensive. While the SECDA methodology enables rapid hardware-software co-design of accelerators through SystemC simulation and FPGA execution, identifying optimal accelerator configurations still requires substantial manual effort and domain expertise. This work presents SECDA-DSE, a framework that integrates Large Language Models (LLMs) into the SECDA ecosystem, comprising tools built aro...
| Authors | Vinamra Sharma, Xingjian Fu, Jude Haris et al. |
|---|---|
| Primary category | cs.AR |
| Published | 7 May 2026 |
| Last updated at source | 7 May 2026 |
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