From Mirage to Grounding: Towards Reliable Multimodal Circuit-to-Verilog Code Generation
Multimodal large language models (MLLMs) are increasingly used to translate visual artifacts into code, from UI mockups into HTML to scientific plots into Python scripts. A circuit diagram can be viewed as a visual domain-specific language for hardware: it encodes timing, topology, and bit level semantics that are invisible to casual inspection yet safety critical once fabricated in silicon. Translating such diagrams into register-transfer-level(RTL) code therefore represents an extreme reliability test for vision-to-code generation. We reveal a phenomenon we call Mirage: replacing a circuit diagram with a blank image leaves Pass@k unchanged or even higher, because models bypass the visua...
| Authors | Guang Yang, Xing Hu, Xiang Chen et al. |
|---|---|
| Primary category | cs.SE |
| Published | 30 April 2026 |
| Last updated at source | 5 May 2026 |
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