HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference
Lookup-table (LUT) based neural networks can deliver ultra-low latency and excellent hardware efficiency on FPGAs by mapping arithmetic operations directly onto the logic primitives. However, state-of-the-art LUT-aware training (LAT) approaches remain difficult to use in practice: they are often orders of magnitude slower to train than conventional networks, require non-trivial manual tuning for hardware efficiency, and lack an end-to-end workflow. This work presents HGQ-LUT, integrated in https://github.com/calad0i/HGQ2, a new LAT approach that achieves state-of-the-art hardware efficiency while accelerating training by over 100 times on modern GPUs. HGQ-LUT introduces LUT-Dense and LUT-...
| Authors | Chang Sun, Zhiqiang Que, Bakhtiar Zadeh et al. |
|---|---|
| Primary category | cs.AR |
| Published | 24 April 2026 |
| Last updated at source | 24 April 2026 |
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