Sign inGet started
Paper · arXiv

R2G: A Multi-View Circuit Graph Benchmark Suite from RTL to GDSII

Graph neural networks (GNNs) are increasingly applied to physical design tasks such as congestion prediction and wirelength estimation, yet progress is hindered by inconsistent circuit representations and the absence of controlled evaluation protocols. We present R2G (RTL-to-GDSII), a multi-view circuit-graph benchmark suite that standardizes five stage-aware views with information parity (every view encodes the same attribute set, differing only in where features attach) over 30 open-source IP cores (up to $10^6$ nodes/edges). R2G provides an end-to-end DEF-to-graph pipeline spanning synthesis, placement, and routing stages, together with loaders, unified splits, domain metrics, and repr...

AuthorsZewei Zhou, Jiajun Zou, Jiajia Zhang et al.
Primary categorycs.CV
Published9 April 2026
Last updated at source9 April 2026
cs.CVcs.LG
Embed this entry
<iframe src="https://silytics.si/embed/item/c2021ce1-ef19-4ab2-ad5d-5a6c32a16481" width="420" height="190" style="border:0" loading="lazy" title="Silytics entry"></iframe>

Free, no tracking. More about feeds and embeds.

Silytics shows public metadata from arXiv and links to the original. Information may be incomplete or out of date. Last refreshed 17 October 2026. Licenses and terms of the original apply to the work itself. Not financial, legal or professional advice.