CPUBone: Efficient Vision Backbone Design for Devices with Low Parallelization Capabilities
Recent research on vision backbone architectures has predominantly focused on optimizing efficiency for hardware platforms with high parallel processing capabilities. This category increasingly includes embedded systems such as mobile phones and embedded AI accelerator modules. In contrast, CPUs do not have the possibility to parallelize operations in the same manner, wherefore models benefit from a specific design philosophy that balances amount of operations (MACs) and hardware-efficient execution by having high MACs per second (MACpS). In pursuit of this, we investigate two modifications to standard convolutions, aimed at reducing computational cost: grouping convolutions and reducing ...
| Authors | Moritz Nottebaum, Matteo Dunnhofer, Christian Micheloni |
|---|---|
| Primary category | cs.CV |
| Published | 27 March 2026 |
| Last updated at source | 30 March 2026 |
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