Sign inGet started
Paper · arXiv

KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuits

Digital circuits representation learning has made remarkable progress in the electronic design automation domain, effectively supporting critical tasks such as testability analysis and logic reasoning. However, representation learning for analog circuits remains challenging due to their continuous electrical characteristics compared to the discrete states of digital circuits. This paper presents a direct current (DC) electrically equivalent-oriented analog representation learning framework, named \textbf{KCLNet}. It comprises an asynchronous graph neural network structure with electrically-simulated message passing and a representation learning method inspired by Kirchhoff's Current Law (...

AuthorsPeng Xu, Yapeng Li, Tinghuan Chen et al.
Primary categorycs.LG
Published25 March 2026
Last updated at source25 March 2026
cs.LGcs.AI
Embed this entry
<iframe src="https://silytics.si/embed/item/ddf938a0-3980-4e51-917f-1c0f24701703" width="420" height="190" style="border:0" loading="lazy" title="Silytics entry"></iframe>

Free, no tracking. More about feeds and embeds.

Silytics shows public metadata from arXiv and links to the original. Information may be incomplete or out of date. Last refreshed 17 October 2026. Licenses and terms of the original apply to the work itself. Not financial, legal or professional advice.