Exploiting temporal parallelism for LSTM Autoencoder acceleration on FPGA
Recurrent Neural Networks (RNNs) are vital for sequential data processing. Long Short-Term Memory Autoencoders (LSTM-AEs) are particularly effective for unsupervised anomaly detection in time-series data. However, inherent sequential dependencies limit parallel computation. While previous work has explored FPGA-based acceleration for LSTM networks, efforts have typically focused on optimizing a single LSTM layer at a time. We introduce a novel FPGA-based accelerator using a dataflow architecture that exploits temporal parallelism for concurrent multi-layer processing of different timesteps within sequences. Experimental evaluations on four representative LSTM-AE models with varying widths...
| Authors | Aimilios Leftheriotis, Dimosthenis Masouros, Dimitrios Soudris et al. |
|---|---|
| Primary category | cs.AR |
| Published | 14 March 2026 |
| Last updated at source | 14 March 2026 |
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