Sign inGet started
Paper · arXiv

NEST: Network- and Memory-Aware Device Placement For Distributed Deep Learning

The growing scale of deep learning demands distributed training frameworks that jointly reason about parallelism, memory, and network topology. Prior works often rely on heuristic or topology-agnostic search, handling communication and memory separately. Without per-device memory awareness, these methods typically ensure feasibility post hoc by sharding parameters and activations across many devices, increasing synchronization, inflating communication, and underutilizing compute-limiting scalability and efficiency on real datacenter networks. We present NEST, a network-, compute-, and memory-aware device placement framework that unifies model parallelism, topology modeling, and memory fea...

AuthorsIrene Wang, Vishnu Varma Venkata, Arvind Krishnamurthy et al.
Primary categorycs.LG
Published6 March 2026
Last updated at source24 May 2026
cs.LGcs.DCstat.ML
Embed this entry
<iframe src="https://silytics.si/embed/item/a3550ebc-f06a-40d1-a349-5d61e1e40a3f" width="420" height="190" style="border:0" loading="lazy" title="Silytics entry"></iframe>

Free, no tracking. More about feeds and embeds.

Silytics shows public metadata from arXiv and links to the original. Information may be incomplete or out of date. Last refreshed 17 October 2026. Licenses and terms of the original apply to the work itself. Not financial, legal or professional advice.