A Persistent-State Dataflow Accelerator for Memory-Bound Linear Attention Decode on FPGA
Gated DeltaNet (GDN) is a linear attention mechanism that replaces the growing KV cache with a fixed-size recurrent state. Hybrid LLMs like Qwen3-Next use 75% GDN layers and achieve competitive accuracy to attention-only models. However, at batch-1, GDN decode is memory-bound on GPUs since the full recurrent state must be round-tripped through HBM every token. We show that this bottleneck is architectural, not algorithmic, as all subquadratic sequence models exhibit arithmetic intensities below 1 FLOP/B at decode time, making them more memory-bound than standard Transformers. We present an FPGA accelerator that eliminates this bottleneck by holding the full 2 MB recurrent state persistent...
| Authors | Neelesh Gupta, Peter Wang, Rajgopal Kannan et al. |
|---|---|
| Primary category | cs.AR |
| Published | 6 March 2026 |
| Last updated at source | 6 March 2026 |
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