Dataset · Hugging Face

Duedahl/full_pre_rvi_mdb

Name: full_pre_rvi_mdb
Creator: Duedahl
License: mit
Keywords: license:mit, region:us, side-channel, power-trace, riscv, asssembly, instruction-sequence

Dataset containing a test-validation-train split of power-trace data with the associated RISC-V instruction sequence. All traces were captured on a Ibex-Demo-System softcore flashed onto a NewAE CW305 Arty-7 FPGA board. This is the large version of the pre_rvi_mdb dataset.

View on Hugging FaceReport an issue

Author / organization	Duedahl
License (as declared)	mit
Downloads	157 (as reported by Hugging Face)
Likes	0
Created	18 July 2025
Last updated at source	18 July 2025

side-channelpower-traceriscvasssemblyinstruction-sequence

Embed this entry

<iframe src="https://silytics.si/embed/item/9a3b3b1f-26d2-45a6-bcfa-3623751dba00" width="420" height="190" style="border:0" loading="lazy" title="Silytics entry"></iframe>

Free, no tracking. More about feeds and embeds.

Popularity, last 2 days

157 now (+9 since 2026-10-16). Counts as reported by the source, snapshotted daily by Silytics.

Silytics shows public metadata from Hugging Face and links to the original. Information may be incomplete or out of date. Last refreshed 17 October 2026. Licenses and terms of the original apply to the work itself. Not financial, legal or professional advice.